Changes between Version 63 and Version 64 of Bibliography


Ignore:
Timestamp:
2012-06-28T01:36:24Z (12 years ago)
Author:
zooko
Comment:

add link to Dodis Katz 2005

Legend:

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  • Bibliography

    v63 v64  
    1313==== Ciphers ====
    1414
     15[http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.65.8477 Chosen-Ciphertext Security of Multiple Encryption] by Dodis, Katz 2005 ; combining two or more ciphers together
     16
    1517[http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.59.9522 Salsa20 Design] a fast and secure cipher
    1618
    … …  
    1820
    1921[http://www.ecrypt.eu.org/stream The European Stream Cipher project] which evaluated many stream ciphers including Salsa20
    20 
    21 [http://www.cryptojedi.org/crypto/index.shtml#aesbs Bitsliced AES implementation] The faster and timing resistant implementation of AES-CTR in bitsliced mode by Peter Schwabe and Emilia Kasper.
    22 
    23 [http://crypto.stanford.edu/vpaes/ Vector permutations and AES] The fast and timing-resistant implementations of Mike Hamburg using vector permute instructions (read: pshufb and vperm).
    2422
    2523=== Public Key Cryptography ===
    … …  
    122120[https://www.minicrypt.cdc.informatik.tu-darmstadt.de/reports/reports/REDBP08.pdf Fast Hash-Based Signatures on Constrained Devices] by Rohde, Eisenbarth, Dahmen, Buchmann, and Paar; a case study of implementing hash-based digital signatures for a 8-bit microcontroller. Their implementation had some trade-offs that we wouldn't want: it is a "key-evolving" design (the signer has to maintain state in order to avoid a security failure), it can only handle a limited number of signatures, and they spent a lot of time in key generation. Hm, they don't say how long key-generation took in this paper—only that it took so long that they had to run it on a PC instead of on their microcontroller. In [Merkle Signatures with Virtually Unlimited Signature Capacity], the key-generation took tens of hours on a PC!!! On the other hand, they do show a digital signature scheme which is faster at signing and verifying and is also arguably safer than RSA or ECDSA on their 8-bit microcontroller.
    123121
     122[http://www.cryptojedi.org/crypto/index.shtml#aesbs Bitsliced AES implementation] The faster and timing resistant implementation of AES-CTR in bitsliced mode by Peter Schwabe and Emilia Kasper.
     123
     124[http://crypto.stanford.edu/vpaes/ Vector permutations and AES] The fast and timing-resistant implementations of Mike Hamburg using vector permute instructions (read: pshufb and vperm).